l  Silicon Physical Design Engineer (PI&PD)

• • Bachelor's degree in Electrical Engineering or equivalent practical experience

  • 5 years of experience in physical design

  • Experience in one or more synthesis/PnR tools (e.g. DC, ICC)

  • Experience in high performance synthesis, PnR

  • Experience in one or more static timing tools (e.g., PrimeTime, Tempus).

  • Experience with Static Timing Analysis signoff constraint authoring for full-chip level, tapeout signoff requirements, checklists, and associated automation

l  자격요건

• • Experience in the delivery of high complexity silicon in advanced technology process nodes ( <7nm)

  • Experience in top-level floorplanning, block integration

  • Experience in extraction of design parameters, QoR metrics, and analyzing data trends.

  • Experience and understanding in engineering across timing analysis, physical design, and high level implementation.

  • Knowledge of semiconductor device physics and transistor characteristics.

  • Experience in low power design Implementation including UPF/CPF, multi-voltage domains, power gating

  • Experience with ASIC design flows and methodology of physical design

  • Fundamentals of computer architecture and Knowledge of Verilog/SystemVerilog

  • Effective skills with scripting languages such as Tcl, and/or Perl

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l  처우

• • 현재연봉 + @ / 적격자의 경우 넓게 고려

l  근무지

• • 경기도 성남

l  제출서류

• • 국문 또는 영문 이력서